DorsaVi (ASX:DVL) has just cleared what is probably the single largest de-risking event hanging over its ReRAM program to date.

DVL has developed three different recipes for its ReRAM memory cells, or what the industry calls “material stacks”, and all three have now passed the tests required for integration inside a standard commercial manufacturing process. This gives DVL’s engineering team the optionality to evaluate all three candidates, select the stack with the strongest performance profile, and lock in the recipe ahead of the next major milestone, known as the tape-out phase.

The ReRAM stack is holding up

Since our last update, DorsaVi’s Tier-1 semiconductor partnerships appear to be progressing well. Nanyang Technological University has supported the ReRAM design work, while ITRI has helped integrate that design into the manufacturing process. Together, this is helping DorsaVi build its material stacks into CMOS production flows.

CMOS is the standard manufacturing platform used across much of the semiconductor industry. DorsaVi is not just proving its technology in a lab. It is showing its ReRAM can fit into established workflows, a critical step toward commercial adoption and scalability.

A clean pass for DorsaVi

Within this CMOS process, DorsaVi was able to show that all three material stacks passed key manufacturing checks, including etching, particle scans and Back-End-of-Line (BEOL) compatibility testing. These are important industry-standard tests because they help confirm the process is clean, repeatable and suitable for integration.

Sum-of-the-Parts valuation of $0.22 per share

We previously said a repeatable manufacturing recipe would support a meaningful re-rate, and today’s announcement delivers that milestone, in our view. It strengthens our thesis and reinforces our Sum-of-the-Parts valuation.

We continue to value dorsaVi at A$0.22 per share, comprising A$0.13 per share for the Sensor business and A$0.09 per share for the ReRAM business.

The next key milestone is validation. Once the final stack is selected and the integration process is proven, the focus shifts to chip performance, stability and durability. This is what turns a qualified manufacturing recipe into the early stages of commercially viable silicon. See page 10 for key investment risks.